Tags

- merge startproject altera and xilinx files in 1 file
- automatize configuration.tcl file
- accept * in tool version to accept all

- implement simulation scripts for xsim (through Vivado) and questasim

- improve READMEs
- add additional_assignments files

- allow to define a list of FPGA compliant with the IP
- allow to define a list of versions for the compilation tool compliant with the IP

- simplify compilation scripts
- handle automatically .gitignore (for quartus)

New versionning (ip will be vX.Y.Z.5) from that ip squelette version
improve scripts for Intel properly dealing with IPs generation

first version working for both Xilinx and Altera and tested successfully.

No filelist
Config & init files added
script path automatically dedected

Version 1 du repository ip-squelette