Example LPCXpresso project for NXP LPC4088

PUBLISHED_FROM=ec4c4ec1ca7fee10c67fbba5a603d59fe44a046d

examples/Makefile

@@ -3,7 +3,7 @@
 
 # `wildcard ./*/` works in both linux and linux/wine, while `wildcard */` enumerates nothing under wine
 SUBDIRS = $(sort $(dir $(wildcard ./*/)))
-SUBDIRS:=$(filter-out ./ ./CC3200/ ./ESP8266_RTOS/ ./MSP432/ ./NXP_K64/ ./PIC32/ ./STM32F4_CC3100/ ./mbed/ ./nRF51/ ./nRF52/, $(SUBDIRS))
+SUBDIRS:=$(filter-out ./ ./CC3200/ ./ESP8266_RTOS/ ./MSP432/ ./NXP_LPC4088/ ./NXP_K64/ ./PIC32/ ./STM32F4_CC3100/ ./mbed/ ./nRF51/ ./nRF52/, $(SUBDIRS))
 
 ifeq ($(OS), Windows_NT)
   SUBDIRS:=$(filter-out ./netcat/ ./raspberry_pi_mjpeg_led/ ./captive_dns_server/, $(SUBDIRS))

examples/NXP_LPC4088/LPCOpen_QSB/README.md

+Please download the [LPCOpen QSB SDK](https://www.embeddedartists.com/sites/default/files/support/qsb/lpc4088/lpcopen_2_10_lpcxpresso_arm_university_4088qsb.zip) and unpack it into this directory.

examples/NXP_LPC4088/LPCXpresso/Mongoose_LPC4088_QSB_BM/.project

+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>Mongoose_LPC4088_QSB_BM</name>
+	<comment></comment>
+	<projects>
+		<project>lpc_chip_40xx</project>
+		<project>lpc_board_ea_devkit_4088</project>
+		<project>webserver</project>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>lwip</name>
+			<type>2</type>
+			<locationURI>LWIP_PATH</locationURI>
+		</link>
+		<link>
+			<name>example/src/mongoose.c</name>
+			<type>1</type>
+			<location>$%7BPARENT-4-PROJECT_LOC%7D/mongoose.c</location>
+		</link>
+	</linkedResources>
+	<variableList>
+		<variable>
+			<name>LWIP_PATH</name>
+			<value>$%7BSDK_PATH%7D/webserver/lwip</value>
+		</variable>
+		<variable>
+			<name>SDK_PATH</name>
+			<value>$%7BPARENT-2-PROJECT_LOC%7D/LPCOpen_QSB</value>
+		</variable>
+	</variableList>
+</projectDescription>

examples/NXP_LPC4088/LPCXpresso/Mongoose_LPC4088_QSB_BM/example/inc/lpc_17xx40xx_emac_config.h

+/* clang-format off */
+/*
+ * @brief LPC17xx/LPC40xx EMAC and PHY driver configuration file for LWIP
+ *
+ * @note
+ * Copyright(C) NXP Semiconductors, 2012
+ * All rights reserved.
+ *
+ * @par
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * LPC products.  This software is supplied "AS IS" without any warranties of
+ * any kind, and NXP Semiconductors and its licensor disclaim any and
+ * all warranties, express or implied, including all implied warranties of
+ * merchantability, fitness for a particular purpose and non-infringement of
+ * intellectual property rights.  NXP Semiconductors assumes no responsibility
+ * or liability for the use of the software, conveys no license or rights under any
+ * patent, copyright, mask work right, or any other intellectual property rights in
+ * or to any products. NXP Semiconductors reserves the right to make changes
+ * in the software without notification. NXP Semiconductors also makes no
+ * representation or warranty that such application will be suitable for the
+ * specified use without further testing or modification.
+ *
+ * @par
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation is hereby granted, under NXP Semiconductors' and its
+ * licensor's relevant copyrights in the software, without fee, provided that it
+ * is used in conjunction with NXP Semiconductors microcontrollers.  This
+ * copyright, permission, and disclaimer notice must appear in all copies of
+ * this code.
+ */
+
+#ifndef __LPC_17XX40XX_EMAC_CONFIG_H_
+#define __LPC_17XX40XX_EMAC_CONFIG_H_
+
+#include "lwip/opt.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/* The PHY address connected the to MII/RMII */
+#define LPC_PHYDEF_PHYADDR 1
+
+/* Autonegotiation mode enable flag */
+#define PHY_USE_AUTONEG 1
+
+/* PHY interface full duplex operation or half duplex enable flag.
+   Only applies if PHY_USE_AUTONEG = 0 */
+#define PHY_USE_FULL_DUPLEX 1
+
+/* PHY interface 100MBS or 10MBS enable flag.
+   Only applies if PHY_USE_AUTONEG = 0 */
+#define PHY_USE_100MBS 1
+
+/* Defines the number of descriptors used for RX */
+#define LPC_NUM_BUFF_RXDESCS 4
+
+/* Defines the number of descriptors used for TX */
+#define LPC_NUM_BUFF_TXDESCS 4
+
+/* Disable slow speed memory buffering */
+#define LPC_CHECK_SLOWMEM 0
+
+/* Array of slow memory address ranges for LPC_CHECK_SLOWMEM */
+#define LPC_SLOWMEM_ARRAY
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __LPC_17XX40XX_EMAC_CONFIG_H_ */

examples/NXP_LPC4088/LPCXpresso/Mongoose_LPC4088_QSB_BM/example/inc/lwipopts.h

+/* clang-format off */
+/*
+ * @brief LWIP build option override file
+ *
+ * @note
+ * Copyright(C) NXP Semiconductors, 2012
+ * All rights reserved.
+ *
+ * @par
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * LPC products.  This software is supplied "AS IS" without any warranties of
+ * any kind, and NXP Semiconductors and its licensor disclaim any and
+ * all warranties, express or implied, including all implied warranties of
+ * merchantability, fitness for a particular purpose and non-infringement of
+ * intellectual property rights.  NXP Semiconductors assumes no responsibility
+ * or liability for the use of the software, conveys no license or rights under any
+ * patent, copyright, mask work right, or any other intellectual property rights in
+ * or to any products. NXP Semiconductors reserves the right to make changes
+ * in the software without notification. NXP Semiconductors also makes no
+ * representation or warranty that such application will be suitable for the
+ * specified use without further testing or modification.
+ *
+ * @par
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation is hereby granted, under NXP Semiconductors' and its
+ * licensor's relevant copyrights in the software, without fee, provided that it
+ * is used in conjunction with NXP Semiconductors microcontrollers.  This
+ * copyright, permission, and disclaimer notice must appear in all copies of
+ * this code.
+ */
+
+#ifndef __LWIPOPTS_H_
+#define __LWIPOPTS_H_
+
+/* Standalone build */
+#define NO_SYS                          1
+
+//#define LWIP_DEBUG			1
+#define LPC_TX_PBUF_BOUNCE_EN	1
+//#define HTTPD_DEBUG         LWIP_DBG_ON
+
+/* Use LWIP timers */
+#define NO_SYS_NO_TIMERS                0
+
+#define LWIP_HTTPD_DYNAMIC_HEADERS      1
+
+/* Need for memory protection */
+#define SYS_LIGHTWEIGHT_PROT            0
+
+/* 32-bit alignment */
+#define MEM_ALIGNMENT                   4
+
+/* pbuf buffers in pool. In zero-copy mode, these buffers are
+   located in peripheral RAM. In copied mode, they are located in
+   internal IRAM */
+#define PBUF_POOL_SIZE                  7
+
+/* No padding needed */
+#define ETH_PAD_SIZE                    0
+
+#define IP_SOF_BROADCAST                1
+#define IP_SOF_BROADCAST_RECV           1
+
+/* The ethernet FCS is performed in hardware. The IP, TCP, and UDP
+   CRCs still need to be done in hardware. */
+#define CHECKSUM_GEN_IP                 1
+#define CHECKSUM_GEN_UDP                1
+#define CHECKSUM_GEN_TCP                1
+#define CHECKSUM_CHECK_IP               1
+#define CHECKSUM_CHECK_UDP              1
+#define CHECKSUM_CHECK_TCP              1
+#define LWIP_CHECKSUM_ON_COPY           1
+
+/* Use LWIP version of htonx() to allow generic functionality across
+   all platforms. If you are using the Cortex Mx devices, you might
+   be able to use the Cortex __rev instruction instead. */
+#define LWIP_PLATFORM_BYTESWAP          0
+
+/* Non-static memory, used with DMA pool */
+#define MEM_SIZE                        (12 * 1024)
+
+/* Raw interface not needed */
+#define LWIP_RAW                        1
+
+/* DHCP is ok, UDP is required with DHCP */
+#define LWIP_DHCP                       1
+#define LWIP_UDP                        1
+
+/* Hostname can be used */
+#define LWIP_NETIF_HOSTNAME             1
+
+#define LWIP_BROADCAST_PING             1
+
+/* MSS should match the hardware packet size */
+#define TCP_MSS                         1460
+#define TCP_SND_BUF                     (2 * TCP_MSS)
+
+#define LWIP_SOCKET                     0
+#define LWIP_NETCONN                    0
+#define MEMP_NUM_SYS_TIMEOUT            300
+
+#define LWIP_STATS                      0
+#define LINK_STATS                      0
+#define LWIP_STATS_DISPLAY              0
+
+/* There are more *_DEBUG options that can be selected.
+   See opts.h. Make sure that LWIP_DEBUG is defined when
+   building the code to use debug. */
+#define TCP_DEBUG                       LWIP_DBG_OFF
+#define ETHARP_DEBUG                    LWIP_DBG_OFF
+#define PBUF_DEBUG                      LWIP_DBG_OFF
+#define IP_DEBUG                        LWIP_DBG_OFF
+#define TCPIP_DEBUG                     LWIP_DBG_OFF
+#define DHCP_DEBUG                      LWIP_DBG_OFF
+#define UDP_DEBUG                       LWIP_DBG_OFF
+
+/* This define is custom for the LPC EMAC driver. Enabled it to
+   get debug messages for the driver. */
+#define EMAC_DEBUG                    LWIP_DBG_OFF
+
+#define MEM_LIBC_MALLOC                 1
+#define MEMP_MEM_MALLOC                 1
+
+/* Needed for malloc/free */
+#include <stdlib.h>
+
+#endif /* __LWIPOPTS_H_ */

examples/NXP_LPC4088/LPCXpresso/Mongoose_LPC4088_QSB_BM/example/readme.txt

+Mongoose Web Server example without an RTOS
+===========================================
+
+This project sets up a simple Web server using the Mongoose Web Server and
+Networking library.
+
+This project depends on lpc_chip_40xx and lpc_board_ea_devkit_4088 (for
+drivers) and the webserver example project (for LWIP).

examples/NXP_LPC4088/LPCXpresso/Mongoose_LPC4088_QSB_BM/example/src/cr_startup_lpc40xx.c

+/* clang-format off */
+//*****************************************************************************
+// LPC407x_8x Microcontroller Startup code for use with LPCXpresso IDE
+//
+// Version : 140114
+//*****************************************************************************
+//
+// Copyright(C) NXP Semiconductors, 2014
+// All rights reserved.
+//
+// Software that is described herein is for illustrative purposes only
+// which provides customers with programming information regarding the
+// LPC products.  This software is supplied "AS IS" without any warranties of
+// any kind, and NXP Semiconductors and its licensor disclaim any and
+// all warranties, express or implied, including all implied warranties of
+// merchantability, fitness for a particular purpose and non-infringement of
+// intellectual property rights.  NXP Semiconductors assumes no responsibility
+// or liability for the use of the software, conveys no license or rights under any
+// patent, copyright, mask work right, or any other intellectual property rights in
+// or to any products. NXP Semiconductors reserves the right to make changes
+// in the software without notification. NXP Semiconductors also makes no
+// representation or warranty that such application will be suitable for the
+// specified use without further testing or modification.
+//
+// Permission to use, copy, modify, and distribute this software and its
+// documentation is hereby granted, under NXP Semiconductors' and its
+// licensor's relevant copyrights in the software, without fee, provided that it
+// is used in conjunction with NXP Semiconductors microcontrollers.  This
+// copyright, permission, and disclaimer notice must appear in all copies of
+// this code.
+//*****************************************************************************
+#if defined (__cplusplus)
+#ifdef __REDLIB__
+#error Redlib does not support C++
+#else
+//*****************************************************************************
+//
+// The entry point for the C++ library startup
+//
+//*****************************************************************************
+extern "C" {
+    extern void __libc_init_array(void);
+}
+#endif
+#endif
+
+#define WEAK __attribute__ ((weak))
+#define ALIAS(f) __attribute__ ((weak, alias (#f)))
+
+//*****************************************************************************
+#if defined (__cplusplus)
+extern "C" {
+#endif
+
+//*****************************************************************************
+#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
+// Declaration of external SystemInit function
+extern void SystemInit(void);
+#endif
+
+//*****************************************************************************
+//
+// Forward declaration of the default handlers. These are aliased.
+// When the application defines a handler (with the same name), this will 
+// automatically take precedence over these weak definitions
+//
+//*****************************************************************************
+     void ResetISR(void);
+WEAK void NMI_Handler(void);
+WEAK void HardFault_Handler(void);
+WEAK void MemManage_Handler(void);
+WEAK void BusFault_Handler(void);
+WEAK void UsageFault_Handler(void);
+WEAK void SVC_Handler(void);
+WEAK void DebugMon_Handler(void);
+WEAK void PendSV_Handler(void);
+WEAK void SysTick_Handler(void);
+WEAK void IntDefaultHandler(void);
+
+//*****************************************************************************
+//
+// Forward declaration of the specific IRQ handlers. These are aliased
+// to the IntDefaultHandler, which is a 'forever' loop. When the application
+// defines a handler (with the same name), this will automatically take 
+// precedence over these weak definitions
+//
+//*****************************************************************************
+void WDT_IRQHandler(void) ALIAS(IntDefaultHandler);
+void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler);
+void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler);
+void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler);
+void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler);
+void UART0_IRQHandler(void) ALIAS(IntDefaultHandler);
+void UART1_IRQHandler(void) ALIAS(IntDefaultHandler);
+void UART2_IRQHandler(void) ALIAS(IntDefaultHandler);
+void UART3_IRQHandler(void) ALIAS(IntDefaultHandler);
+void PWM1_IRQHandler(void) ALIAS(IntDefaultHandler);
+void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler);
+void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler);
+void I2C2_IRQHandler(void) ALIAS(IntDefaultHandler);
+void SPI_IRQHandler(void) ALIAS(IntDefaultHandler);
+void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler);
+void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler);
+void PLL0_IRQHandler(void) ALIAS(IntDefaultHandler);
+void RTC_IRQHandler(void) ALIAS(IntDefaultHandler);
+void EINT0_IRQHandler(void) ALIAS(IntDefaultHandler);
+void EINT1_IRQHandler(void) ALIAS(IntDefaultHandler);
+void EINT2_IRQHandler(void) ALIAS(IntDefaultHandler);
+void EINT3_IRQHandler(void) ALIAS(IntDefaultHandler);
+void ADC_IRQHandler(void) ALIAS(IntDefaultHandler);
+void BOD_IRQHandler(void) ALIAS(IntDefaultHandler);
+void USB_IRQHandler(void) ALIAS(IntDefaultHandler);
+void CAN_IRQHandler(void) ALIAS(IntDefaultHandler);
+void DMA_IRQHandler(void) ALIAS(IntDefaultHandler);
+void I2S_IRQHandler(void) ALIAS(IntDefaultHandler);
+#if defined (__USE_LPCOPEN)
+void ETH_IRQHandler(void) ALIAS(IntDefaultHandler);
+#else
+void ENET_IRQHandler(void) ALIAS(IntDefaultHandler);
+#endif
+void RIT_IRQHandler(void) ALIAS(IntDefaultHandler);
+void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler);
+void QEI_IRQHandler(void) ALIAS(IntDefaultHandler);
+void PLL1_IRQHandler(void) ALIAS(IntDefaultHandler);
+void USBActivity_IRQHandler(void) ALIAS(IntDefaultHandler);
+void CANActivity_IRQHandler(void) ALIAS(IntDefaultHandler);
+#if defined (__USE_LPCOPEN)
+void SDIO_IRQHandler(void) ALIAS(IntDefaultHandler);
+#else
+void MCI_IRQHandler(void) ALIAS(IntDefaultHandler);
+#endif
+void UART4_IRQHandler(void) ALIAS(IntDefaultHandler);
+void SSP2_IRQHandler(void) ALIAS(IntDefaultHandler);
+void LCD_IRQHandler(void) ALIAS(IntDefaultHandler);
+void GPIO_IRQHandler(void) ALIAS(IntDefaultHandler);
+void PWM0_IRQHandler(void) ALIAS(IntDefaultHandler);
+void EEPROM_IRQHandler(void) ALIAS(IntDefaultHandler);
+
+//*****************************************************************************
+//
+// The entry point for the application.
+// __main() is the entry point for Redlib based applications
+// main() is the entry point for Newlib based applications
+//
+//*****************************************************************************
+#if defined (__REDLIB__)
+extern void __main(void);
+#endif
+extern int main(void);
+//*****************************************************************************
+//
+// External declaration for the pointer to the stack top from the Linker Script
+//
+//*****************************************************************************
+extern void _vStackTop(void);
+
+//*****************************************************************************
+#if defined (__cplusplus)
+} // extern "C"
+#endif
+//*****************************************************************************
+//
+// The vector table.
+// This relies on the linker script to place at correct location in memory.
+//
+//*****************************************************************************
+extern void (* const g_pfnVectors[])(void);
+__attribute__ ((section(".isr_vector")))
+void (* const g_pfnVectors[])(void) = {
+    // Core Level - CM4
+    &_vStackTop,                        // The initial stack pointer
+    ResetISR,                           // The reset handler
+    NMI_Handler,                        // The NMI handler
+    HardFault_Handler,                  // The hard fault handler
+    MemManage_Handler,                  // The MPU fault handler
+    BusFault_Handler,                   // The bus fault handler
+    UsageFault_Handler,                 // The usage fault handler
+    0,                                  // Reserved
+    0,                                  // Reserved
+    0,                                  // Reserved
+    0,                                  // Reserved
+    SVC_Handler,                        // SVCall handler
+    DebugMon_Handler,                   // Debug monitor handler
+    0,                                  // Reserved
+    PendSV_Handler,                     // The PendSV handler
+    SysTick_Handler,                    // The SysTick handler
+
+    // Chip Level - LPC40xx
+    WDT_IRQHandler,                     // 16, 0x40 - WDT
+    TIMER0_IRQHandler,                  // 17, 0x44 - TIMER0
+    TIMER1_IRQHandler,                  // 18, 0x48 - TIMER1
+    TIMER2_IRQHandler,                  // 19, 0x4c - TIMER2
+    TIMER3_IRQHandler,                  // 20, 0x50 - TIMER3
+    UART0_IRQHandler,                   // 21, 0x54 - UART0
+    UART1_IRQHandler,                   // 22, 0x58 - UART1
+    UART2_IRQHandler,                   // 23, 0x5c - UART2
+    UART3_IRQHandler,                   // 24, 0x60 - UART3
+    PWM1_IRQHandler,                    // 25, 0x64 - PWM1
+    I2C0_IRQHandler,                    // 26, 0x68 - I2C0
+    I2C1_IRQHandler,                    // 27, 0x6c - I2C1
+    I2C2_IRQHandler,                    // 28, 0x70 - I2C2
+    IntDefaultHandler,                  // 29, Not used
+    SSP0_IRQHandler,                    // 30, 0x78 - SSP0
+    SSP1_IRQHandler,                    // 31, 0x7c - SSP1
+    PLL0_IRQHandler,                    // 32, 0x80 - PLL0 (Main PLL)
+    RTC_IRQHandler,                     // 33, 0x84 - RTC
+    EINT0_IRQHandler,                   // 34, 0x88 - EINT0
+    EINT1_IRQHandler,                   // 35, 0x8c - EINT1
+    EINT2_IRQHandler,                   // 36, 0x90 - EINT2
+    EINT3_IRQHandler,                   // 37, 0x94 - EINT3
+    ADC_IRQHandler,                     // 38, 0x98 - ADC
+    BOD_IRQHandler,                     // 39, 0x9c - BOD
+    USB_IRQHandler,                     // 40, 0xA0 - USB
+    CAN_IRQHandler,                     // 41, 0xa4 - CAN
+    DMA_IRQHandler,                     // 42, 0xa8 - GP DMA
+    I2S_IRQHandler,                     // 43, 0xac - I2S
+#if defined (__USE_LPCOPEN)
+    ETH_IRQHandler,                     // 44, 0xb0 - Ethernet
+    SDIO_IRQHandler,                    // 45, 0xb4 - SD/MMC card I/F
+#else
+    ENET_IRQHandler,                    // 44, 0xb0 - Ethernet
+    MCI_IRQHandler,                     // 45, 0xb4 - SD/MMC card I/F
+#endif                               
+    MCPWM_IRQHandler,                   // 46, 0xb8 - Motor Control PWM
+    QEI_IRQHandler,                     // 47, 0xbc - Quadrature Encoder
+    PLL1_IRQHandler,                    // 48, 0xc0 - PLL1 (USB PLL)
+    USBActivity_IRQHandler,             // 49, 0xc4 - USB Activity interrupt to wakeup
+    CANActivity_IRQHandler,             // 50, 0xc8 - CAN Activity interrupt to wakeup
+    UART4_IRQHandler,                   // 51, 0xcc - UART4
+    SSP2_IRQHandler,                    // 52, 0xd0 - SSP2
+    LCD_IRQHandler,                     // 53, 0xd4 - LCD
+    GPIO_IRQHandler,                    // 54, 0xd8 - GPIO
+    PWM0_IRQHandler,                    // 55, 0xdc - PWM0
+    EEPROM_IRQHandler,                  // 56, 0xe0 - EEPROM
+
+};
+
+//*****************************************************************************
+// Functions to carry out the initialization of RW and BSS data sections. These
+// are written as separate functions rather than being inlined within the
+// ResetISR() function in order to cope with MCUs with multiple banks of
+// memory.
+//*****************************************************************************
+__attribute__ ((section(".after_vectors")))
+void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
+    unsigned int *pulDest = (unsigned int*) start;
+    unsigned int *pulSrc = (unsigned int*) romstart;
+    unsigned int loop;
+    for (loop = 0; loop < len; loop = loop + 4)
+        *pulDest++ = *pulSrc++;
+}
+
+__attribute__ ((section(".after_vectors")))
+void bss_init(unsigned int start, unsigned int len) {
+    unsigned int *pulDest = (unsigned int*) start;
+    unsigned int loop;
+    for (loop = 0; loop < len; loop = loop + 4)
+        *pulDest++ = 0;
+}
+
+//*****************************************************************************
+// The following symbols are constructs generated by the linker, indicating
+// the location of various points in the "Global Section Table". This table is
+// created by the linker via the Code Red managed linker script mechanism. It
+// contains the load address, execution address and length of each RW data
+// section and the execution and length of each BSS (zero initialized) section.
+//*****************************************************************************
+extern unsigned int __data_section_table;
+extern unsigned int __data_section_table_end;
+extern unsigned int __bss_section_table;
+extern unsigned int __bss_section_table_end;
+
+//*****************************************************************************
+// Reset entry point for your code.
+// Sets up a simple runtime environment and initializes the C/C++
+// library.
+//*****************************************************************************
+__attribute__ ((section(".after_vectors")))
+void
+ResetISR(void) {
+
+    //
+    // Copy the data sections from flash to SRAM.
+    //
+    unsigned int LoadAddr, ExeAddr, SectionLen;
+    unsigned int *SectionTableAddr;
+
+    // Load base address of Global Section Table
+    SectionTableAddr = &__data_section_table;
+
+    // Copy the data sections from flash to SRAM.
+    while (SectionTableAddr < &__data_section_table_end) {
+        LoadAddr = *SectionTableAddr++;
+        ExeAddr = *SectionTableAddr++;
+        SectionLen = *SectionTableAddr++;
+        data_init(LoadAddr, ExeAddr, SectionLen);
+    }
+    // At this point, SectionTableAddr = &__bss_section_table;
+    // Zero fill the bss segment
+    while (SectionTableAddr < &__bss_section_table_end) {
+        ExeAddr = *SectionTableAddr++;
+        SectionLen = *SectionTableAddr++;
+        bss_init(ExeAddr, SectionLen);
+    }
+
+#if defined (__VFP_FP__) && !defined (__SOFTFP__)
+/*
+ * Code to enable the Cortex-M4 FPU only included
+ * if appropriate build options have been selected.
+ * Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C)
+ */  
+    // Read CPACR (located at address 0xE000ED88)
+    // Set bits 20-23 to enable CP10 and CP11 coprocessors
+    // Write back the modified value to the CPACR
+    asm volatile ("LDR.W R0, =0xE000ED88\n\t"
+                  "LDR R1, [R0]\n\t"
+                  "ORR R1, R1, #(0xF << 20)\n\t"
+                  "STR R1, [R0]");  
+#endif // (__VFP_FP__) && !(__SOFTFP__)
+
+    // Check to see if we are running the code from a non-zero
+    // address (eg RAM, external flash), in which case we need
+    // to modify the VTOR register to tell the CPU that the
+    // vector table is located at a non-0x0 address.
+
+    // Note that we do not use the CMSIS register access mechanism,
+    // as there is no guarantee that the project has been configured
+    // to use CMSIS.
+    unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
+    if ((unsigned int *)g_pfnVectors!=(unsigned int *) 0x00000000) {
+        // CMSIS : SCB->VTOR = <address of vector table>
+        *pSCB_VTOR = (unsigned int)g_pfnVectors;
+    }
+
+#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
+    SystemInit();
+#endif
+
+#if defined (__cplusplus)
+    //
+    // Call C++ library initialisation
+    //
+    __libc_init_array();
+#endif
+
+#if defined (__REDLIB__)
+    // Call the Redlib library, which in turn calls main()
+    __main() ;
+#else
+    main();
+#endif
+
+    //
+    // main() shouldn't return, but if it does, we'll just enter an infinite loop 
+    //
+    while (1) {
+        ;
+    }
+}
+
+//*****************************************************************************
+// Default exception handlers. Override the ones here by defining your own
+// handler routines in your application code.
+//*****************************************************************************
+__attribute__ ((section(".after_vectors")))
+void NMI_Handler(void)
+{ while(1) {}
+}
+
+__attribute__ ((section(".after_vectors")))
+void HardFault_Handler(void)
+{ while(1) {}
+}
+
+__attribute__ ((section(".after_vectors")))
+void MemManage_Handler(void)
+{ while(1) {}
+}
+
+__attribute__ ((section(".after_vectors")))
+void BusFault_Handler(void)
+{ while(1) {}
+}
+
+__attribute__ ((section(".after_vectors")))
+void UsageFault_Handler(void)
+{ while(1) {}
+}
+
+__attribute__ ((section(".after_vectors")))
+void SVC_Handler(void)
+{ while(1) {}
+}
+
+__attribute__ ((section(".after_vectors")))
+void DebugMon_Handler(void)
+{ while(1) {}
+}
+
+__attribute__ ((section(".after_vectors")))
+void PendSV_Handler(void)
+{ while(1) {}
+}
+
+__attribute__ ((section(".after_vectors")))
+void SysTick_Handler(void)
+{ while(1) {}
+}
+
+//*****************************************************************************
+//
+// Processor ends up here if an unexpected interrupt occurs or a specific
+// handler is not present in the application code.
+//
+//*****************************************************************************
+__attribute__ ((section(".after_vectors")))
+void IntDefaultHandler(void)
+{ while(1) {}
+}

examples/NXP_LPC4088/LPCXpresso/Mongoose_LPC4088_QSB_BM/example/src/main.c

+/*
+ * Copyright (c) 2014-2016 Cesanta Software Limited
+ * All rights reserved
+ */
+
+#include "mongoose.h"
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <time.h>
+
+#include "lwip/dhcp.h"
+#include "lwip/init.h"
+#include "lwip/netif.h"
+#include "lwip/raw.h"
+#include "lwip/timers.h"
+#include "netif/etharp.h"
+
+#include "board.h"
+#include "lpc_phy.h"
+#include "arch/lpc17xx_40xx_emac.h"
+#include "arch/lpc_arch.h"
+
+/* IP address configuration. */
+#define USE_DHCP 1 /* For static IP, set to 0 and configure options below */
+#if !USE_DHCP
+#define STATIC_IP "192.168.0.111"
+#define STATIC_NM "255.255.255.0"
+#define STATIC_GW "192.168.0.1"
+#endif
+
+void ev_handler(struct mg_connection *nc, int ev, void *ev_data) {
+  if (ev == MG_EV_POLL) return;
+  /* printf("ev %d\r\n", ev); */
+  switch (ev) {
+    case MG_EV_ACCEPT: {
+      char addr[32];
+      mg_sock_addr_to_str(&nc->sa, addr, sizeof(addr),
+                          MG_SOCK_STRINGIFY_IP | MG_SOCK_STRINGIFY_PORT);
+      printf("%p: Connection from %s\r\n", nc, addr);
+      break;
+    }
+    case MG_EV_HTTP_REQUEST: {
+      struct http_message *hm = (struct http_message *) ev_data;
+      char addr[32];
+      mg_sock_addr_to_str(&nc->sa, addr, sizeof(addr),
+                          MG_SOCK_STRINGIFY_IP | MG_SOCK_STRINGIFY_PORT);
+      printf("%p: %.*s %.*s\r\n", nc, (int) hm->method.len, hm->method.p,
+             (int) hm->uri.len, hm->uri.p);
+      mg_send_response_line(nc, 200,
+                            "Content-Type: text/html\r\n"
+                            "Connection: close");
+      mg_printf(nc,
+                "\r\n<h1>Hello, %s!</h1>\r\n"
+                "You asked for %.*s\r\n",
+                addr, (int) hm->uri.len, hm->uri.p);
+      nc->flags |= MG_F_SEND_AND_CLOSE;
+      Board_LED_Toggle(2);
+      break;
+    }
+    case MG_EV_CLOSE: {
+      printf("%p: Connection closed\r\n", nc);
+      break;
+    }
+  }
+}
+
+void handle_eth(struct netif *eth_if) {
+  /* PHY link status. */
+  uint32_t status = lpcPHYStsPoll();
+
+  if (status & PHY_LINK_CHANGED) {
+    if (status & PHY_LINK_CONNECTED) {
+      Board_LED_Set(0, true);
+
+      if (status & PHY_LINK_SPEED100) {
+        Chip_ENET_Set100Mbps(LPC_ETHERNET);
+      } else {
+        Chip_ENET_Set10Mbps(LPC_ETHERNET);
+      }
+      if (status & PHY_LINK_FULLDUPLX) {
+        Chip_ENET_SetFullDuplex(LPC_ETHERNET);
+      } else {
+        Chip_ENET_SetHalfDuplex(LPC_ETHERNET);
+      }
+
+      netif_set_link_up(eth_if);
+      printf("Link up\r\n");
+    } else {
+      Board_LED_Set(0, false);
+      Board_LED_Set(1, false);
+      netif_set_link_down(eth_if);
+      printf("Link down\r\n");
+    }
+  }
+
+  /* Handle packets as part of this loop, not in the IRQ handler */
+  lpc_enetif_input(eth_if);
+
+  /* Free TX buffers that are done sending */
+  lpc_tx_reclaim(eth_if);
+}
+
+int gettimeofday(struct timeval *tv, void *tzvp) {
+  tv->tv_sec = time(NULL);
+  tv->tv_usec = 0;
+  return 0;
+}
+
+/*
+ * This is a callback invoked by Mongoose to signal that a poll is needed soon.
+ * Since we're in a tight polling loop anyway (see below), we don't need to do
+ * anything.
+ */
+void mg_lwip_mgr_schedule_poll(struct mg_mgr *mgr) {
+}
+
+int main(void) {
+  struct netif eth0;
+
+  SystemCoreClockUpdate();
+  Board_Init();
+  SysTick_Enable(1);
+
+  lwip_init();
+
+  Board_LED_Set(0, false); /* Link state */
+  Board_LED_Set(1, false); /* DHCP state */
+  Board_LED_Set(2, false); /* HTTP request activity indicator */
+  Board_LED_Set(3, false); /* Error indicator */
+
+#if USE_DHCP
+  netif_add(&eth0, NULL, NULL, NULL, NULL, lpc_enetif_init, ethernet_input);
+  printf("Waiting for DHCP...\r\n");
+  dhcp_start(&eth0);
+  u8_t os = 0xff, ds;
+  do {
+    ds = eth0.dhcp->state;
+    if (ds != os) {
+      printf("  DHCP state: %d\r\n", ds);
+      os = ds;
+    }
+    handle_eth(&eth0);
+    sys_check_timeouts();
+  } while (ds != DHCP_BOUND);
+  printf("DHCP bound.\r\n");
+#else
+  ip_addr_t ip, nm, gw;
+  if (!ipaddr_aton(STATIC_IP, &ip) || !ipaddr_aton(STATIC_NM, &nm) ||
+      !ipaddr_aton(STATIC_GW, &gw)) {
+    printf("Invalid static IP configuration.\r\n");
+    Board_LED_Set(3, true);
+    return 1;
+  } else {
+    netif_add(&eth0, &ip, &nm, &gw, NULL, lpc_enetif_init, ethernet_input);
+    netif_set_up(&eth0);
+  }
+#endif
+  netif_set_default(&eth0);
+  printf("Setting up HTTP server...\r\n");
+
+  struct mg_mgr mgr;
+  mg_mgr_init(&mgr, NULL);
+
+  const char *err;
+  struct mg_bind_opts opts = {};
+  opts.error_string = &err;
+  struct mg_connection *nc = mg_bind_opt(&mgr, "80", ev_handler, opts);
+  if (nc == NULL) {
+    printf("Failed to create listener: %s\r\n", err);
+    Board_LED_Set(3, true);
+    return 1;
+  }
+  mg_set_protocol_http_websocket(nc);
+  printf("Server address: http://%s/\r\n", ipaddr_ntoa(&eth0.ip_addr));
+
+  while (1) {
+    /* Ethernet link status, low level input. */
+    handle_eth(&eth0);
+
+    /* LWIP timers - ARP, DHCP, TCP, etc. */
+    sys_check_timeouts();
+
+    /* Mongoose poll */
+    mg_mgr_poll(&mgr, 0);
+  }
+
+  return 0;
+}

examples/NXP_LPC4088/LPCXpresso/Mongoose_LPC4088_QSB_BM/example/src/sysinit.c

+/* clang-format off */
+/*
+ * @brief Common SystemInit function for LPC17xx/40xx chips
+ *
+ * @note
+ * Copyright(C) NXP Semiconductors, 2013
+ * All rights reserved.
+ *
+ * @par
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * LPC products.  This software is supplied "AS IS" without any warranties of
+ * any kind, and NXP Semiconductors and its licensor disclaim any and
+ * all warranties, express or implied, including all implied warranties of
+ * merchantability, fitness for a particular purpose and non-infringement of
+ * intellectual property rights.  NXP Semiconductors assumes no responsibility
+ * or liability for the use of the software, conveys no license or rights under any
+ * patent, copyright, mask work right, or any other intellectual property rights in
+ * or to any products. NXP Semiconductors reserves the right to make changes
+ * in the software without notification. NXP Semiconductors also makes no
+ * representation or warranty that such application will be suitable for the
+ * specified use without further testing or modification.
+ *
+ * @par
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation is hereby granted, under NXP Semiconductors' and its
+ * licensor's relevant copyrights in the software, without fee, provided that it
+ * is used in conjunction with NXP Semiconductors microcontrollers.  This
+ * copyright, permission, and disclaimer notice must appear in all copies of
+ * this code.
+ */
+
+ #include "board.h"
+
+/*****************************************************************************
+ * Private types/enumerations/variables
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Public types/enumerations/variables
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Private functions
+ ****************************************************************************/
+
+/*****************************************************************************
+ * Public functions
+ ****************************************************************************/
+
+/* Set up and initialize hardware prior to call to main */
+void SystemInit(void)
+{
+	unsigned int *pSCB_VTOR = (unsigned int *) 0xE000ED08;
+
+#if defined(__IAR_SYSTEMS_ICC__)
+	extern void *__vector_table;
+
+	*pSCB_VTOR = (unsigned int) &__vector_table;
+#elif defined(__CODE_RED)
+	extern void *g_pfnVectors;
+
+	*pSCB_VTOR = (unsigned int) &g_pfnVectors;
+#elif defined(__ARMCC_VERSION)
+	extern void *__Vectors;
+
+	*pSCB_VTOR = (unsigned int) &__Vectors;
+#endif
+
+#if defined(__FPU_PRESENT) && __FPU_PRESENT == 1
+	fpuInit();
+#endif
+
+#if defined(NO_BOARD_LIB)
+	/* Chip specific SystemInit */
+	Chip_SystemInit();
+#else
+	/* Setup system clocking and muxing */
+	Board_SystemInit();
+#endif
+}

examples/NXP_LPC4088/README.md

+Mongoose Web Server example without an RTOS
+===========================================
+
+This project sets up a simple Web server using the Mongoose Web Server and
+Networking library.
+
+This project is based on the [LPC4088 QuickStart Board](https://www.embeddedartists.com/products/boards/lpc4088_qsb.php) from Embedded Artists.
+
+Please download the [modified LPCOpen SDK](https://www.embeddedartists.com/sites/default/files/support/qsb/lpc4088/lpcopen_2_10_lpcxpresso_arm_university_4088qsb.zip)
+and unpack it into the `LPCOpen_QSB` directory.
+
+This project depends on `lpc_chip_40xx` and `lpc_board_ea_devkit_4088` (for drivers)
+and the `webserver` example project (for LWIP). Please import them along with this project.
+
+By default, the project uses DHCP to obtain an IP address.
+If you want to configure a static IP address, please edit the settings at the top of `example/src/main.c`.