new file: example_design/SPI_IF.vhd

new file: example_design/main_reset.vhd new file: example_design/new_slow_control.vhd new file: example_design/pll.xci modified: scripts/design_tool_versions.txt modified: scripts/fpga_ids.txt new file: sources/hdl/catiroc_slowcontrol.vhd new file: sources/packages/common_package.vhd new file: sources/sdc/fpga_constraintes.xdc