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IPSL
SIRTA
CL31
CL raw to 1a
Commits
1c64b5e1
Commit
1c64b5e1
authored
Feb 20, 2017
by
Marc-Antoine Drouin
Browse files
change source for P7 data
parent
ebe047d4
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conf_vaisala_cl31_p7.ini
conf_vaisala_cl31_p7.ini
+1
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run_raw2l1_sirta30s.sh
run_raw2l1_sirta30s.sh
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conf_vaisala_cl31_p7.ini
View file @
1c64b5e1
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@@ -47,7 +47,7 @@ history =
instrument_firmware_version
=
unknown
overlap_function
=
false
overlap_is_corrected
=
true
source
=
SIRT
A
source
=
LIS
A
references
=
comment
=
Conventions
=
CF-1.0, UKMO-1.0.2
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run_raw2l1_sirta30s.sh
View file @
1c64b5e1
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@@ -30,6 +30,7 @@
# 20161206 : MAD SIRTA Creation v1.00
# 20170220 : MAD SIRTA add configuration for P7. use submodule for raw2l1
# : v1.0.1 correct problem with path of configuration file
# : v1.0.2 correct source for LISA configuration file
#
# SIRTA 2013
#==============================================================================
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