corrected many files

README.md

scripts/compile.tcl

scripts/simulate.tcl

simulation/tb_module_1.vhdl

sources/module_1.vhdl

sources/module_10.vhdl

sources/module_2.vhdl

sources/module_3.vhdl

sources/module_4.vhdl

sources/module_5.vhdl

sources/module_6.vhdl

sources/module_7.vhdl

sources/module_8.vhdl

sources/module_9.vhdl